In an electronic chip in operation, MOS transistors are successively in off and on states to carry out functions such as logic operations. The off state or the on state of a transistor depends on the voltage applied between a gate arranged above a channel-forming area (referred to as the front gate) and a source of the transistor. When the voltage is greater in absolute value than a front gate threshold voltage, the transistor is on. The transistor is in an off state when the voltage is smaller than the threshold voltage.
When the transistor has a structure of silicon-on-insulator type (SOI), that is, the transistor is formed inside and on top of a thin silicon layer covering an insulating layer arranged on a support, a back gate may be formed under the transistor. The back gate is a doped region separated from the transistor by the insulating layer. Characteristics such that the front gate threshold voltage of the transistor then depend on the thickness of the insulating layer, on the doping type of the back gate, and on the potential applied to the back gate. The application of a potential on the back gate enables to accelerate the operation of the transistor or to decrease the power consumption thereof. The back gate may further enable to operate the transistor as a memory cell.
Various solutions have been provided for the forming of transistors having front and back gates. Such solutions raise various implementation issues.